Device Explorer
Each card is one ANSI device function (IEEE C37.2). Drag the operating point or move the sliders to see when the element picks up, operates or restrains, and why. Settings shown are teaching examples.
Suffix letters such as P, N, G and Q are common practice and vary by manufacturer.
How a relay decides
A protective relay measures currents and voltages through current and voltage transformers (CTs and VTs), compares what it measures with its settings, and decides whether to trip a breaker. Every lab in this tool shows that chain step by step, and the Why? inspector names the condition that decided the outcome and the evidence for it.
Four moments are easy to blur, and they are not the same:
- Pickup: the measured quantity crosses the element's threshold and the element starts timing.
- Operate: the element's timer completes and its output asserts, provided nothing blocks or restrains it.
- Trip: the relay's trip logic (which elements may trip, with any direction permission or blocking) energizes the breaker trip coil.
- Fault cleared: the breaker interrupts the current at a current zero, its interrupting time after the trip. Relay time and breaker time are each counted once.
A good scheme is dependable (it trips for the faults it must clear) and secure (it does not trip for anything else: load, inrush, overexcitation, external faults, CT errors). The lessons score both.
The three fidelity levels
Every plot carries a badge saying how much to trust it.
| Level | What it means | In Rev 0 |
|---|---|---|
| L1 principle | The plot shows the idea: the shape of a characteristic or the order of logic events, drawn from its definition. No claim about timing or accuracy. | Principle cards: the voltage and frequency bands (27, 47, 59, 59N, 64, 81), V/Hz (24), directional and power (67, 67N, 32), 51V/51C, synchronism check (25), the impedance sketches (21, 40, 78), and the logic and auxiliary devices. |
| L2 explicit reference algorithm | Every number is computed from the equations on this page, deterministically, and checked against independent hand calculations. It is not a manufacturer's implementation: filtering, measuring windows, tolerances, setting names and ranges differ between relays. | Feeder lab, transformer lab, and the 50, 51, 46, 49 and 87 (T, B, L, G, N) cards. |
| L3 verified manufacturer model | A model checked against a specific relay's documentation and test results. | None. |
Equations used, with sources
Symmetrical components
a = 1∠120° X0 = (Xa + Xb + Xc) / 3 X1 = (Xa + a·Xb + a²·Xc) / 3 X2 = (Xa + a²·Xb + a·Xc) / 3 residual 3I0 = Ia + Ib + Ic neg. seq. 3I2 = Ia + a²·Ib + a·Ic
Phase rotation ABC (B lags A by 120°). Source: Fortescue (1918); P. M. Anderson, Analysis of Faulted Power Systems.
Network impedances and per unit
| Quantity | Equation |
|---|---|
| Source, positive sequence | |Z1| = kV² / MVAsc3 at angle atan(X/R); Z2 = Z1 |
| Source, zero sequence | |2·Z1 + Z0| = 3·kV² / MVAsc1, solved for |Z0| at angle atan(X0/R0) |
| Transformer | Zt = (%Z/100)·kV² / MVA at angle atan(X/R); Z0 = Z1 (common approximation: exact for banks of single-phase units; three-limb core-form units usually have Z0 somewhat below Z1, and a YNyn0 core-form unit also has a phantom-tertiary zero-sequence path, not modelled) |
| Per-unit bases | Zbase = kV² / MVA, Ibase = MVA·10⁶ / (√3·kV·10³) |
Feeder sections use positive- and zero-sequence ohms per mile (defaults labelled "typical" for 336.4 kcmil ACSR overhead). Line charging and the transformer magnetizing branch are neglected in the fault solution. Source: J. D. Glover, M. S. Sarma, T. J. Overbye, Power System Analysis and Design, ch. 3, 8 and 9.
Fault currents (prefault E = 1.0 pu, fault resistance Rf)
| Fault | Sequence currents |
|---|---|
| 3PH | I1 = E / (Z1 + Rf) |
| SLG (A-G) | I0 = I1 = I2 = E / (Z1 + Z2 + Z0 + 3Rf) |
| LL (B-C) | I1 = −I2 = E / (Z1 + Z2 + Rf) |
| LLG (B-C-G) | I1 = E / (Z1 + Z2·(Z0+3Rf) / (Z2+Z0+3Rf)); I2 = −I1·(Z0+3Rf) / (Z2+Z0+3Rf); I0 = −I1·Z2 / (Z2+Z0+3Rf) |
Load, when present, is added as a constant balanced current on top of the fault currents (superposition; teaching approximation). Source: Glover, Sarma, Overbye, ch. 9; Anderson.
- Model limits, feeder lab: relays act on ideal phasors (no DFT window or filter delay, no DC offset, so no transient overreach) from ideal CTs; load is added as a constant current everywhere, even beyond a bolted fault, where in reality it would be de-energized. That overstates the relay currents by a few per cent when load is on, so the lessons that set or check margins (F1 to F4) run with the load off: instantaneous reach and coordination margins are set on fault current alone, with the strongest source.
Through a delta-wye transformer
Positive-sequence quantities on the low-voltage side lag the high-voltage side by 30°, negative-sequence quantities lead by 30°, and zero sequence does not pass the delta. Two results follow, used in lessons F3 and F4:
| LV fault | What the HV side carries |
|---|---|
| Single line to ground, current If | Two line currents of If·(kVL/kVH)/√3, the third zero; no residual current. |
| Phase to phase, current ILL | One line current of (2/√3)·(kVL/kVH)·ILL ≈ 1.155·(kVL/kVH)·ILL, the other two half of that. |
Relay elements and timing
| Item | Equation | Source |
|---|---|---|
| CT secondary | Isec = Ipri / CTR × polarity (±1); multiples of CT nominal = Isec / 5 A | - |
| 51, IEEE curves | t = TD·(A / (M^p − 1) + B), M = I / pickup > 1 | IEEE C37.112-2018 |
| 51, IEEE reset (disk emulation) | tr = TD·tr0 / (1 − M²), M < 1 | IEEE C37.112-2018 |
| 51, IEC curves | t = TMS·k / (M^α − 1) (same form with A = k, B = 0, p = α) | IEC 60255-151 |
| 51 integrator | G += Δt / t(M) while M > 1; operate when G ≥ 1; disk reset G −= Δt / tr(M) while M < 1. A constant current operates exactly at t(M). | reference algorithm |
| 50 | operate = delay + inherent time after continuous pickup; drops out below 95 % of pickup | reference algorithm |
| Clearing time | relay operate time + breaker interrupting time (5 cycles = 0.0833 s by default) | - |
| CTI | operate time (upstream) − operate time (downstream), at the same fault current | - |
| One-cycle DFT | X_h[n] = (√2/N)·Σ x[m]·e^(−j2πhm/N) over the last N = 64 samples: rms phasor of harmonic h | Phadke and Thorp, ch. 3 |
Inverse-time curves are evaluated with the shared Kewo TCC engine. The DFT estimate settles one full cycle after a change. It rejects steady DC and integer harmonics exactly, but a decaying DC offset leaks into every harmonic estimate (including the 2nd) while it decays.
Device Explorer models
| Card | Equation | Source |
|---|---|---|
| 46 | operate when ∫ I2² dt ≥ K; constant I2: t = K / I2² (I2 in pu of rated current) | IEEE C37.102 |
| 49 | t = τ·ln((I² − IP²) / (I² − (k·IB)²)) | IEC 60255-149 |
| 24 | t = td / (M − 1)^n, M = (V/Hz) / pickup | generic form, teaching approximation |
| 21 | ground loop Z = VA / (IA + k0·3I0), k0 = (Z0L − Z1L) / (3·Z1L); mho operates when |Z − Zr/2| < |Zr/2|, Zr = reach∠MTA | IEEE C37.113 |
| 67, 67N | forward when the angle of Iop relative to Vpol is within ±90° of the MTA: torque ∝ cos(∠Iop − ∠Vpol − MTA) | IEEE C37.113 |
| 32 | S = Va·Ia* + Vb·Ib* + Vc·Ic*, P = Re S, Q = Im S | - |
| 40 | two offset mho circles below the R axis: offset −X'd/2, diameters 1.0 pu and Xd | IEEE C37.102 |
| 25 | at slip s (Hz) the angle moves 360·s degrees per second; time inside ±φ is 2φ / (360·s) | - |
| 51V / 51C | pickup reduced in proportion to voltage, floor 25 % (restrained); enabled only below a control voltage (controlled) | teaching approximation |
| 87L | 1 ms of channel misalignment = 360 × 60 × 0.001 = 21.6° at 60 Hz | - |
| 87T | see the 87T algorithm | IEEE C37.91 |
Inverse-time curve constants
Generic curves as declared in the standards, not any manufacturer's curves. Times are for TD = 1 (IEEE) or TMS = 1 (IEC) at multiples of pickup M; scale linearly with the dial.
| Curve | Standard | A (k) | B | p (α) | tr | M = 2 | M = 5 | M = 10 | M = 20 |
|---|---|---|---|---|---|---|---|---|---|
| Moderately inverse | IEEE C37.112-2018 | 0.0515 | 0.1140 | 0.02 | 4.85 | 3.803 | 1.688 | 1.207 | 0.948 |
| Very inverse | IEEE C37.112-2018 | 19.61 | 0.491 | 2 | 21.6 | 7.028 | 1.308 | 0.689 | 0.540 |
| Extremely inverse | IEEE C37.112-2018 | 28.2 | 0.1217 | 2 | 29.1 | 9.522 | 1.297 | 0.407 | 0.192 |
| Standard inverse | IEC 60255-151 | 0.14 | 0 | 0.02 | - | 10.03 | 4.280 | 2.971 | 2.267 |
| Very inverse | IEC 60255-151 | 13.5 | 0 | 1 | - | 13.50 | 3.375 | 1.500 | 0.711 |
| Extremely inverse | IEC 60255-151 | 80 | 0 | 2 | - | 26.67 | 3.333 | 0.808 | 0.201 |
| Long-time inverse | IEC 60255-3 / BS 142 legacy (not in IEC 60255-151) | 120 | 0 | 1 | - | 120.0 | 30.00 | 13.33 | 6.316 |
- IEEE time dial range in this lab: 0.1 to 15. Relays scale the dial differently, so a dial value is not portable between relay models.
- IEC time multiplier range: 0.05 to 1. This lab resets IEC curves instantaneously; relays offer other reset options.
- tr is the IEEE reset constant: the reset time from M = 0 at TD = 1 (for example 21.6 s for very inverse).
- Many relays stop the curve at a maximum multiple of pickup; above it the time stays constant. The value is relay-specific.
Transformer differential (87T): the reference algorithm
Reference direction: both CTs measure current into the transformer. A through current then appears as equal and opposite compensated currents, and the operating current is close to zero.
1. Magnitude: TAP
TAP_k = MVA·10⁶ / (√3·kV_k·10³·CTR_k) = rated current referred to the CT secondary (wye CTs) Teaching transformer: 20 MVA, 69/12.47 kV, CTs 200:5 and 1200:5: TAPH = 4.184 A, TAPL = 3.858 A
2. Phase shift and zero-sequence removal
I = identity: no compensation
Z = (1/3) × [ 2 −1 −1 ]
[ −1 2 −1 ]
[ −1 −1 2 ]
no phase shift,
removes zero sequence
P30 = (1/√3) × [ 1 −1 0 ]
[ 0 1 −1 ]
[ −1 0 1 ]
Ia' = (Ia − Ib)/√3
+30° on positive sequence,
−30° on negative sequence,
removes zero sequence
M30 = (1/√3) × [ 1 0 −1 ]
[ −1 1 0 ]
[ 0 −1 1 ]
Ia' = (Ia − Ic)/√3
−30° on positive sequence,
+30° on negative sequence,
removes zero sequence
| Relay set to compensate | HV side | LV side | Why |
|---|---|---|---|
| Dyn1 | I | P30 | HV delta line currents carry no zero sequence; the LV wye side lags by 30° and can carry zero sequence, so it is advanced 30° and its zero sequence removed. |
| YNd1 | M30 | I | The HV wye side is retarded 30° to match the lagging LV side, and its zero sequence removed. |
| YNyn0 | Z | Z | No phase shift; zero sequence removed on both grounded-wye sides. |
| Yy0 | I | I | No compensation: the deliberate error in lesson T9 when the transformer is really Dyn1. |
Matrices of this form are standard in numerical transformer differential practice (IEEE C37.91 discusses magnitude, phase-angle and zero-sequence compensation); the lab names them by what they do, not by any manufacturer's code.
3. Operating and restraint currents, per phase, in multiples of TAP
IHc = M_H · I_HV,sec / TAPH ILc = M_L · I_LV,sec / TAPL Iop = |IHc + ILc| Irt = (|IHc| + |ILc|) / 2
IHc and ILc are the compensated HV and LV winding currents (subscripts H and L, not sequence numbers: I1 and I2 in this lab mean positive and negative sequence).
Relays define restraint differently (average, maximum or sum of the currents); this lab uses the average.
4. Characteristic
87R operates when Iop > O87P and Iop > f(Irt) f(Irt) = SLP1·Irt for Irt ≤ IRS1 f(Irt) = SLP1·IRS1 + SLP2·(Irt − IRS1) for Irt > IRS1 (continuous at IRS1) 87U operates when Iop > U87P, regardless of harmonics
5. Harmonics (from the same one-cycle DFT of each phase's differential current)
r2 = I2h / Iop, r5 = I5h / Iop (evaluated only where Iop > O87P; a ratio of two near-zero numbers carries no information)
blocking (default): phase k blocked if r2 ≥ PCT2 or r5 ≥ PCT5
per-phase: each phase blocked by its own harmonics; cross-blocking: any blocked phase blocks all
restraint (option): operate if Iop > f(Irt) + K2·I2h + K5·I5h, K2 = 100/PCT2, K5 = 100/PCT5 by default
The default K2 and K5 put the restraint boundary at the blocking ratio when the slope term is small (Iop > K2·I2h is the same as r2 < PCT2). This is a derivation for teaching, not a manufacturer constant.
6. Qualification and trip
87R must assert continuously for 1 cycle before it operates (a teaching choice, a setting in the lab). The unrestrained 87U has the same 1-cycle qualification, on top of the 1-cycle DFT, so here it takes about 2 cycles; real unrestrained elements are often faster (instantaneous or peak-based measurement, under 1 cycle). The trip output opens both transformer breakers.
The qualification time matters in lesson T6: in this model phase B's 2nd-harmonic ratio stays below 15 % for only about 1.5 cycles (0.040 to 0.065 s), just long enough for the 1-cycle qualification; with a 1.5-cycle qualification the same inrush would not trip.
Teaching-example defaults
O87P 0.3 · SLP1 25 % · IRS1 3.0 · SLP2 60 % · U87P 10 · PCT2 15 % · PCT5 35 % · blocking mode · cross-blocking off. Setting names are labels for this algorithm; each manufacturer uses its own names and ranges.
Three checks you can do by hand
- Correct compensation, ideal CTs, any through current: Iop = 0.
- One CT reversed: the two currents add instead of cancel, Iop = 2 × the through current in TAP multiples (lesson T8).
- Relay set Yy0 on a Dyn1 transformer: the two currents are 30° apart, Iop = |1∠0° − 1∠−30°| × load = 2·sin 15° × load ≈ 0.518 × load (lesson T9).
CT saturation model
A CT's core needs flux to drive current through the secondary circuit. A large current with a decaying DC offset builds flux cycle after cycle; once the core saturates, the secondary current collapses for part of each cycle. The relay then sees a smaller, distorted current, and a differential relay sees a false operating current.
ideal secondary current i2' = i_pri / N secondary circuit dλ/dt = (Rct + Rb)·i_sec, i_sec = i2' − i_m(λ) two-slope magnetizing curve i_m = λ / Lm for |λ| ≤ λsat; above: Imk + (|λ| − λsat) / Ls, Ls = Lm / Lratio saturation flux λsat = √2·Vs / ω, Vs = C + 20·Isn·Rct (from the C-class rating, IEEE C57.13) remanence initial λ = rem × λsat
A widely used check for avoiding saturation with a fully offset fault current is IEEE C37.110: (1 + X/R) × If × Zb ≤ 20, with If in multiples of rated CT current and Zb in per unit of the standard burden.
Limits of this model
- Teaching approximation in the style of the IEEE PSRC CT saturation calculator: a two-slope curve replaces the calculator's excitation curve.
- Resistive burden only; no hysteresis loop (remanence is the starting flux only); no eddy-current or core-loss effects.
- Backward-Euler integration, solved exactly on each straight segment of the curve.
- It shows the mechanism and the order of magnitude. It is not a CT sizing study.
Magnetizing inrush and overexcitation models
Energizing a transformer can push its core flux far above normal, because the flux starts from the remanent value and must follow the integral of the applied voltage. The core saturates on one polarity and draws large, one-sided current pulses that only flow on the energized side, so the differential relay sees them as differential current. Their strong 2nd harmonic is what lets the relay recognize them.
winding voltage v = φm·ω·sin(ωt + θ) (pu; θ = energizing angle of that winding's voltage) core flux φ(t) = −φm·cos(ωt + θ) + (φres + φm·cos θ)·e^(−t/τ) magnetizing i = φ / Lm for |φ| ≤ φsat; above: φsat/Lm + (|φ| − φsat) / Xac (Xac = air-core reactance) delta windings line currents iA = (iAB − iCA)/√3, iB = (iBC − iAB)/√3, iC = (iCA − iBC)/√3 (pu of rated line current)
At θ = 0 (energized at a voltage zero) this is φres + φm·(1 − cos ωt) with the DC flux decaying; with remanence of the same sign the peak approaches 2φm + φres.
| Preset (teaching example) | φres (A, B, C) | θ | φsat | Xac | Lm | τ |
|---|---|---|---|---|---|---|
| Typical inrush | 0.6, −0.3, −0.3 | 30° | 1.25 | 0.3 | 500 | 0.5 s |
| Low 2nd-harmonic inrush | 0.6, −0.6, 0 | 300° | 1.05 | 0.3 | 500 | 0.5 s |
Flux values are in pu of rated peak flux, reactances in pu on the energized winding's base; θ is the angle of the phase-A source voltage (sine reference) at which the breaker closes. The lab computes and reports each phase's 2nd-harmonic ratio; it never hard-codes a block decision.
The low 2nd-harmonic preset represents a core whose knee (1.05 pu) sits close to its normal operating flux, so it saturates deeply on energization: the current pulses are wide and one phase's ratio falls to about 12 to 14 %, below the 15 % setting (lesson T6). In this simple model, low remanence on its own raises the ratio (narrower pulses); the low ratio comes from deep saturation. Low 2nd-harmonic inrush has been reported for some modern transformers; the physical causes are more varied than this model shows.
Overexcitation
The same kind of magnetizing curve (here with its knee at 1.15 pu flux and an air-core reactance of 0.3 pu, teaching values) driven at a steady flux amplitude equal to the V/Hz in pu, with no DC. Symmetric saturation produces odd harmonics. The 3rd harmonic is in phase in all three windings, so it circulates in a delta winding and does not reach the delta-side line currents; the 5th is left as the dominant harmonic in the differential current. That is why 87T relays block on 5th harmonic (lesson T10). In this model, at about 1.35 to 1.38 pu V/Hz the exciting current is just above 0.3 × TAP with a 5th-harmonic ratio of about 38 to 43 %; deeper overexcitation widens the current pulses and the ratio falls below 35 %, so the 87T trips. Either way, the 24 (V/Hz) relay, not the 87T, protects the core.
Limits of these models
- One fixed decay time constant; winding resistance and source impedance neglected.
- Each limb independent: no magnetic coupling between the limbs of a three-phase core, no hysteresis, no core loss.
- No sympathetic inrush between parallel transformers.
- Waveforms are synthetic teaching examples, not electromagnetic-transient (EMT) simulations.
Logic and timers
Logic cards (50BF, 52, 60, 62, 79, 86, 94) are L1 timing diagrams: they show the order of events and how the timers add up, not a particular relay's logic.
| Device | The timing that matters |
|---|---|
| 52 breaker | Trip coil energized → contacts part → current interrupted at a current zero. The rated interrupting time (IEEE C37.04) spans trip-circuit energization to interruption; this lab uses 5 cycles. |
| 50BF breaker failure | Breaker-failure timer ≥ breaker interrupting time + current-detector reset time + safety margin (IEEE C37.119). Backup clearing = protection operate + BF timer + lockout and backup breaker times. |
| 79 reclosing | Trip → open interval → reclose; repeated up to the set number of shots, then lockout. The reset (reclaim) time must run out with the breaker closed before the count returns to shot 1. |
| 62 timer | Pickup delay: output only after the input has lasted that long. Dropout delay: output held that long after the input goes. |
| 94 trip relay | Self-resetting; in the card, a dropout (seal-in) delay keeps the trip contact closed long enough for the breaker to open. |
| 86 lockout | Latches on a trip pulse and stays operated until a deliberate reset; blocks closing meanwhile. |
| 60 loss of potential | Voltage changes as if there were a fault, but the currents do not change: declare LOP and block or modify the voltage-dependent elements. |
Conventions
- Phasors are rms values; angles in degrees, positive = leading (counter-clockwise). Phase rotation ABC.
- Reference directions. Feeder lab: currents are measured away from the source, toward the fault. Transformer lab: both CTs measure current into the transformer. Directional elements: forward is the direction the CT polarity points to.
- ANSI 30°. For delta-wye and wye-delta transformers the low-voltage positive-sequence quantities lag the high-voltage ones by 30° (IEEE C57.12.00); negative-sequence quantities shift the other way. The lab uses the IEC vector-group letters (IEC 60076-1) as labels: Dyn1 and YNd1 both mean the low-voltage side lags by 30°, which is the ANSI arrangement.
- Per-unit bases. Network: transformer MVA and each zone's rated kV. Overcurrent: multiples of pickup M = I / pickup, and CT secondary nominal (5 A). 87T: multiples of TAP. Machines: the machine rating. Each card names the base next to every setting.
- Primary and secondary. Relay settings are in secondary amperes or volts; plots and tables may show primary values, and say so.
- Notation. I2 is the negative-sequence current; the second harmonic is written I2h, or "2nd harmonic", and its ratio r2 = I2h / Iop. Likewise I5h and r5. 3I0 is the residual current, 3I2 three times the negative-sequence current, V2 the negative-sequence voltage. The angle symbol ∠ means "at an angle of".
- Times. t = 0 is the start of the simulation; the fault begins at its event time. Operate time is counted from pickup; clearing time from fault inception; CTI compares operate times.
- Teaching examples. Every setting value in the tool is labelled as a teaching example. None is a recommended field setting.
Glossary
| Pickup | The measured quantity crosses the setting and the element starts timing. |
| Dropout | The element resets after the quantity falls back (below about 95 % of pickup here). |
| Operate | The element's output asserts after its timer completes. |
| Trip | The relay energizes the breaker trip coil. |
| Clearing time | From fault inception to current interruption: relay operate time plus breaker interrupting time. |
| Inherent time | The relay's own processing time when no delay is set (an explicit assumption in this lab). |
| CTI | Coordination time interval: the margin between upstream and downstream operate times at the same fault. |
| Dependability / security | Tripping when it should / not tripping when it should not. |
| Selectivity | Only the device nearest the fault trips. |
| Sensitivity | The smallest fault the element can detect (lesson F6). |
| Reach | How far into the system an element responds. Overreach: responds beyond its intended point; underreach: falls short. |
| Polarizing quantity | The reference (usually a voltage) a directional element compares the current with. |
| MTA | Maximum torque angle: the current angle, relative to the polarizing quantity, of maximum directional sensitivity. |
| Memory voltage | The prefault voltage remembered for a short time to polarize close-in faults. |
| TAP | The transformer rated current referred to a CT secondary; the 87T base. |
| Operating / restraint current | The phasor sum of the compensated currents (Iop) and their average magnitude (Irt). |
| Slope | How fast the operate threshold rises with restraint current. |
| Harmonic blocking / cross-blocking | Blocking a differential phase on its 2nd or 5th harmonic ratio; cross-blocking lets any blocked phase block all three. |
| 87U (unrestrained) | A high-set differential level that trips without restraint or harmonic checks. |
| Inrush | The magnetizing current when a transformer is energized; large, one-sided and rich in 2nd harmonic. |
| Remanence | Flux left in a core after it was de-energized. |
| Overexcitation | Flux above rated because V/Hz is above rated. |
| Burden | The impedance connected to a CT secondary (relay, leads). |
| C rating | IEEE C57.13 accuracy class: the secondary terminal voltage the CT delivers at 20 times rated current into a standard burden without exceeding 10 % ratio error. |
| Residual current | The sum of the three phase CT currents, 3I0. |
| Retrip | A second trip attempt of the same breaker by breaker-failure logic. |
| Open interval / reclaim | Reclosing dead time / time the breaker must stay closed before the reclosing sequence resets. |
| Fuse saving | Fast tripping before the first reclose so a temporary fault clears before a lateral fuse blows. |
| Lockout | A latched state that blocks closing until a deliberate reset. |
| DFT | Discrete Fourier transform; here a one-cycle filter that extracts the fundamental and harmonic phasors. |
Standards and sources
| Reference | Used for |
|---|---|
| IEEE C37.2 | Device function numbers and names (paraphrased on the cards). |
| IEEE C37.112-2018 | Inverse-time overcurrent curve equations and constants, reset equation. |
| IEC 60255-151 | IEC inverse-time curve equations and constants. |
| IEC 60255-149 | Thermal (49) operating-time equation. |
| IEEE C37.91 | Transformer protection: percentage differential, compensation, inrush and overexcitation. |
| IEEE C37.102 | Generator protection: 40, 32, 46, 24, 51V, 64G, 78, 87G. |
| IEEE C37.101 | Generator ground protection (59N, third-harmonic and injection methods). |
| IEEE C37.96 | Motor protection (46, 47, 49, 27). |
| IEEE C37.113 | Transmission line protection (21, 67, 78, 87L context). |
| IEEE C37.243 | Line current differential relays using digital communication. |
| IEEE C37.234 | Bus protection (87B). |
| IEEE C37.230 | Distribution feeder protection. |
| IEEE C37.104 | Automatic reclosing. |
| IEEE C37.119 | Breaker failure protection. |
| IEEE C37.117, IEEE C37.106 | Load shedding; abnormal frequency protection for generating plants. |
| IEEE C37.110 | CT application and saturation. |
| IEEE C57.13 | Instrument transformer ratings (CT C-class). |
| IEEE C57.12.00 | Transformer general requirements, including the ANSI 30° angular displacement. |
| IEC 60076-1 | Vector-group notation (Dyn1, YNd1, YNyn0). |
| IEEE C37.04 | Circuit breaker ratings, rated interrupting time. |
| IEEE 1547 | DER interconnection (voltage and frequency trip and ride-through context). |
| IEEE C50.13 | Cylindrical-rotor generator capability (negative-sequence limits, synchronizing context). |
| Glover, Sarma, Overbye, Power System Analysis and Design | Per unit, sequence networks, fault equations, transformer phase shift, RL switching transient. |
| Anderson, Analysis of Faulted Power Systems | Symmetrical components and fault analysis. |
| Phadke and Thorp, Computer Relaying for Power Systems | Full-cycle Fourier filter. |
| IEEE PSRC CT saturation calculator | Style of the CT saturation teaching model. |
Disclaimer
Protection Lab is a teaching tool. Example settings are not field settings. The calculations are L2 reference algorithms, not a specific manufacturer's relay. Waveforms are synthetic teaching examples, not EMT simulations.
Real settings come from a protection study by a qualified engineer, using the system data, the equipment data and the manufacturer's documentation for the actual relays.